In order to be able to fabricate integrated circuits (ICs) of increased performance than is currently feasible, device contacts must be developed which reduce the electrical resistance of the contact to the ICs' Si body or integrated electronic device formed therein. A contact is the electrical connection, at the Si surface, between the devices in the Si wafer and the metal layers, which serve as interconnects. Interconnects serve as the metal wiring that carry electrical signals throughout the chip.
Silicide contacts are of specific importance to IC's, including complementary metal oxide semiconductor (CMOS) devices because of the need to reduce the electrical resistance of the many Si contacts, at the source/drain and gate regions, in order to increase chip performance.
Silicides are metal-silicon compounds that provide for low electrical resistivity at the Si/metal interface and are selected to be sufficiently thermally stable for any further processing.
Silicide formation typically requires depositing a transition metal such as Ni, Co or Ti onto the surface of a Si-containing material or wafer. Conventional processing of Ni silicide films begins with depositing a Ni layer with a thickness of about 8 to about 14 nm. The thickness of the resulting silicide is 2.2 times the thickness of the deposited Ni layer, i.e., Ni layers with a thickness of about 8 to about 14 nm form silicides with a thickness of about 18 to about 31 nm, respectively. Following deposition, the structure is then subjected to one or more annealing steps using conventional processes such as, but not limited to: rapid thermal annealing. During thermal annealing, the deposited metal reacts with Si forming a metal silicide. Following the annealing process, a 10 nm Ni metal layer forms a low resistivity Ni monosilicide that has a thickness of approximately 22 nm.
Ni may serve as a metal for silicide formation. One advantage of Ni silicides is that Ni monosilicide contacts consume less Si than conventional Ti or Co silicide contacts. A disadvantage of Ni silicide contacts is that the higher resistivity Ni disilicide phase can be produced during high temperature processing steps, rather than the preferred lower resistivity Ni monosilicide phase. The formation of the Ni disilicide phase is nucleation controlled and disadvantageously consumes more Si than the preferred Ni monosilicide phase. Ni disilicides produce a rougher silicide/Si wafer interface and also have a higher sheet resistivity than the preferred Ni monosilicide phase. A second disadvantage is that thin Ni monosilicide films tend to become discontinuous before Ni disilicide formation leading to high resistivity. A third disadvantage resides in the multiplicity of metal-rich phases that also lead to roughness and sensitivity of the phase formation temperature to the dopant type and concentration incorporated in the starting Si substrate.
In view of the above, it would be highly desirable to provide a Ni monosilicide contact having low resistivity, and high temperature stability, while being easily fabricated utilizing well-known CMOS processing steps. It would also be highly desirable to provide a Ni monosilicide contact that is uniform (i.e., a limited surface roughness) whose formation temperature is not dependent on the dopant concentration within the Si-containing substrate.